This invention relates to the packaging of electronic devices, and, more particularly, to the structure upon which integrated circuits and the like are supported for inserting into an electronic circuit assembly.
Integrated circuits are electronic devices that are extremely miniaturized, so that hundreds or even thousands of individual circuits and active elements are formed on a chip that may be only 1/2 inch on a side. The reduction in size of such circuits reduces their weight and volume requirements, and also increases their operating speeds because the distances that electrons must travel are reduced. The widespread adoption of integrated circuitry has revolutionized many areas of electronics.
The integrated circuits themselves are extremely small and fragile. They must therefore be packaged and protected in a manner that permits external electrical connections to be made, and permits the integrated circuits to be handled in a normal manner during the assembly and repair of electronic devices that may utilize one or many such packaged integrated circuits.
One approach to packaging is to attach the integrated circuit to a substrate. The substrate supports the integrated circuit, and provides electrical connection points. Fine wires are attached between pads on the integrated circuit and pads on the substrate, and typically electrical conductor paths (termed "traces") extend from the pads on the substrate to other locations on the substrate that are spaced apart sufficiently that external connections can be readily made.
The substrate is normally electrically nonconducting, so that there is a natural insulation barrier between the various conductor traces that run across the surface of the substrate. The mounted integrated circuit is also electrically isolated on its bottom side, and can be electrically isolated on the top side by applying an insulation layer. One popular material of construction of the substrate is an organic resin material that is readily formed and also is nonconducting. These resin boards, known as printed circuit boards, are often found inside commercial and industrial electronic systems such as computers, radios, and televisions. Mounting of the integrated circuit on the resin board insulates it electrically from the surroundings on its bottom side, and a layer of liquid resin is often spread over the top of the integrated circuit and allowed to harden, to electrically insulate the integrated circuit on the top side.
An alternative approach has been to use a piece of ceramic as a substrate, and to join the integrated circuit to the ceramic base. Metallic conductor traces run across the surface of the substrate to provide external electrical connections. A cover can be attached over the integrated circuit to protect it. Such a package is known as a hermetic package, because it provides an electrically insulating, long-lasting, completely sealed support for the electronic device mounted upon it that is impervious to external substances such as moisture that could damage the integrated circuit. The preparation of hermetic packages presents different, and typically more complex, problems than does the preparation of nonhermetic packages, which are not impervious to moisture, because of restrictions on the materials and techniques of construction. The present invention deals with such hermetic packaging for electronic devices.
One important type of hermetic package is the pin grid array, known as a PGA. The pin grid array package has an electronic device attached to a top side thereof, and electrical conduction traces running across the top surface of the ceramic. In many cases there are multiple levels of ceramic layers and conduction traces thereupon, to provide a sufficiently low resistance conduction path and also to permit desired interconnections within the package. Electrically conducting pins extend outwardly from the package, typically in an array that extends downwardly from the bottom side of the ceramic base, opposite the top side where the electronic device is mounted. The pins can be inserted into a conforming socket in a larger electronic system, permitting easy installation and removal of the package and its contained electronic device.
The cost of pin grid array packages, not including the cost of the integrated circuit mounted upon the package, is normally stated in a number of cents per pin of the array. The cost of currently available single level PGA packages (that is, having a single ceramic substrate and not multiple layers of ceramic) is about 5-7 cents per pin. The materials of construction of the package contribute a small fraction of this cost.
Most of the cost of conventional PGA packages is incurred in the complex series of steps required to fabricate the package. Thus, cost is a way of expressing the totality of the technical difficulties in preparing the package. Conducting channels termed vias are formed through the ceramic substrate, and the pins are attached to one side of the vias. Several types of electrically conducting materials are used in the conducting traces on the top side of the base and connected together end to end to form series paths. The portion of the trace nearest the integrated circuit is gold to permit attachment to aluminum wires extending to the integrated circuit. The portion of the trace adjacent the vias is an alloy of silver and palladium to prevent leaching of the silver into the solder used to connect the two. The intermediate portion of the trace is silver. Each portion of the path must be separately deposited on the substrate. Yields of final, good quality packages are reduced as the number of individual steps increases, simply because there are always some failures in each individual step. The complex structure is also prone to service failures related to the mode of fabrication, such as failures at the joints between the various segments of the top-surface conduction traces or separation of the pins.
For these and other reasons, the cost of single level, hermetic pin grid array packages has remained relatively high. It would be desirable to develop a pin grid array package that has significantly reduced cost, reflecting a technically less complex method of fabrication, and is also of simpler construction so as to be more reliable in service. The present invention fulfills this need, and further provides related advantages.